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Staff Signal Integrity Engineer

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Hardware Engineering
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182556 Requisition #
Thanks for your interest in the Staff Signal Integrity Engineer position. Unfortunately this position has been closed but you can search our 0 open jobs by clicking here.

         Masters degree in electronics engineering or physics

         10 years of experience specifying complex high layer count (20 layer) board stack-ups, via stack-up, and trace rout constraints for compute server, high density network switch, or equivalent designs.

         Thorough understanding of measurement and analysis techniques for cross talk, insertion and return loss, phase noise, and bit error rate.

         Working knowledge of high speed SERDES transmitter and receiver equalization techniques.

         Understanding of board level passive channel design solutions for 20GHz+ SERDES circuits.

         Thorough hands-on experience with circuit simulation tools including PCIe SEASIM, Cadence Sigrity, and Keysight ADS, and 3D field solvers such as Ansys HFSS, CST, or Simbeor.   

         Experience with compliance measurements for SATA, PCIe3, and DDR4 buses.

         Extensive experience with high bandwidth oscilloscopes, vector network analyzers, microprobes, Bertscopes, and phase noise analyzers for clocks, SERDES signal integrity, and power integrity test and measurement.

         Ability to write simulation and data processing scripts with Python and Matlab.

         Familiarity with power distribution network impedance simulation and measurement

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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