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Staff HW Application Engineer - Mixed Signal IP, SerDes, SAS/SATA

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Hardware Engineering
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182327 Requisition #

Come join an established and growing team responsible for chip and board level silicon validation/characterization on Marvell’s internal Mix Signal IP's such as High-Speed SerDes (SATA/SAS, USB, PCIe, KR/CR etc.), PLL, ADC, LDO etc.
 
What you’ll be doing includes:
 
•Responsible for IPs' protocol characterization; MCU firmware algorithm verification, validation and debug; and PIPE/MAC layer system testing.
•Works include but not limited to developing bench level silicon validation test plans, executing the test plans, and generating appropriate test reports.
•Responsible for script development (knowledge of Excel VBA, Python, Perl and/or C/C++ is a plus) to automate testing.
•Provides IP bring up/debugging support to SoC teams.
•Provides IP usage training to Marvell’s internal FAE.
•Participate in analog and digital high-speed board layout, design, and schematic review.
•Work with IP design team on new chip features, definitions, and bring-up
•Work with architecture team on future product definitions.
•Develop technical collateral such as application notes, user guide, data sheets, and hardware manuals

 
  •  BSEE (MSEE preferred) with minimum 5 years of “real world” experience.
  • Good fundamental knowledge in analog/digital circuit and data communication system.
  • Working experience or knowledge in any of the following SerDes technologies is required – SATA/SAS, Fiber Channel, PCI Express, USB etc.
  • Working experience on semiconductor chip testing and measurement is a must.
  • Must be willing to work in a multi-tasking, fast pace, and team oriented working environment.
  • Good communication skills and capable of independent work with less guidance
 

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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