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Staff CPU/Sub-system Verification Engineer

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Design Engineering
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182708 Requisition #


 
Successful candidate will be a verification engineer, responsible for verification of a high-performance server CPU

 

Responsibilities:

  • Setup/develop infrastructure for verification of a high performance CPU/Memory sub-system at a unit/core level
  • Work closely with architects/RTL engineers to bringup a new architecture/micro-architecture on the verification environment
  • Verification of one or more blocks of a high performance CPU both architecturally and micro-architecturally
  • Understand micro-architecture of the block/s to be verified, and develop and execute testplans for the same
  • Own and debug failures in simulation to root-cause problems
  • Closely work with RTL engineers of block being verified for testplan development, execution, and debug 
 

 

  • Strong verification skills including a good knowledge and understanding of different verification methodologies (architecture vs micro-architecture level, random vs directed testing, fullchip vs module-level)
  • Good CPU architecture/micro-architecture knowledge  (one of MIPS/PowerPC/ARM/x86/SPARC architectures, CPU pipeline, out-of-order, superscalar, caches, coherency/consistency)
  • Working knowledge and experience on Verilog
  • Strong programming background on C++ and/or System Verilog
  • Knowledge and experience on system verilog testbench methodologies
  • Worked through tapeout on verifying a complex high-performance CPU on atleast one project
  • Knowledge of unix/linux environment and scripting (perl/python)

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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