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Design Engineering
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182377 Requisition #
Thanks for your interest in the Sr. Staff Design Engineer position. Unfortunately this position has been closed but you can search our 0 open jobs by clicking here.

Education & Experience Necessary for Success

MSEE & 5-8 years’ experience in design verification

SOC Design experience

Experience in Verilog, system Verilog and UVM

Knowledge of SSD, PCIe MAC, PHY & DDR  

Be able to write silicon validation test case in C/C++ and UVM environment

Knowledge of ARM CPU & ARM (AXI/AHB/APB) bus interface

Experience with synthesis

Knowledge of low power design & power domain simulation with UPF

Knowledge of SRAM controller and ECC design helpful


#LI-LH1

#GLDR


All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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