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Sr Staff ASIC Design Engineer

Design Engineering
182391 Requisition #
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  • BSEE or equivalent required with up to 10+ years of experience in RTL design of SoC products (or MSEE with 8+ years of experience). 
  • Experience in micro-architecture of complex custom/ASIC products focusing in one or more of the following areas: NPU, embedded processors, DSP, graphics, and general purpose microprocessors. 
  • RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block-level functional verification.
  • Experience in designing high speed (>1 GHz)/high-performance embedded processor SOC products is a plus.
  • Experience in implementation/timing closure for high speed design.
  • Design knowledge of one or more of industry-standard bus interfaces (PCIe, Ethernet, SPI, SRIO, USB, DDR2, DDR3, etc.) is a plus.
  • Hands-on experience for all aspects of chip-development process with proficiency in front-end design tools and methodologies is a plus.
  • Knowledge of scripting languages such as Python, Perl, Tcl, and UNIX shell is desirable.



All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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