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Sr. Staff Digital IC Design Engineer

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Design Engineering
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181218 Requisition #
Thanks for your interest in the Sr. Staff Digital IC Design Engineer position. Unfortunately this position has been closed but you can search our 401 open jobs by clicking here.

Education & Experience Necessary for Success

• BSEE / MSEE, 8+ years of DFT experience

• Experience in DFT architecture, Hierarchical Scan Design, Scan insertion, Scan compression, Stuck-At, At-Speed test and coverage analysis.

• Experience in Mentor's latest DFT tool flow preferred.

• Experience in high speed MBIST design, implementation, simulation and debug on RTL and gates netlist

• Familiar with DFT timing constraints to close DFT timing in test mode STA

• Experience with front-end design methodology including STA, Formal Verification, Synthesis, Linting, CDC

• Familiar with script languages: Python, Perl, and TCL

 

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All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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