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Senior level RTL Design Engineer

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Design Engineering
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181971 Requisition #
Thanks for your interest in the Senior level RTL Design Engineer position. Unfortunately this position has been closed but you can search our 0 open jobs by clicking here.
  • BS degree with 1 year of experience or MS degree in EE or CS.
  • Experience in one or more of the following: RTL design, synthesis, static timing analysis, formal verification, or functional verification.
  • Experience in designing high-speed (>1 GHz) /high-performance embedded processor SOC products is a plus.
  • Knowledge of scripting languages such as Python, Perl, and Tcl is desirable.
  • Design knowledge of industry standard bus interfaces (PCIe, SPI, SRIO, USB, XAUI, etc.) or memory interfaces (DDR2, DDR3, etc.) is a plus.
  • Knowledge of physical design is a plus.
  • Proficiency with front-end design tools and methodologies is a plus.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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