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Design Engineering
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180386 Requisition #

Marvell first revolutionized the digital storage industry by moving information at speeds never thought possible!

 

Today, that same breakthrough innovation remains at the heart of the company's storage, network infrastructure, and wireless connectivity solutions. With leading intellectual property and deep system-level knowledge, Marvell's semiconductor solutions continue to transform the Enterprise, Data Center, SMB, Cloud, Automotive, Industrial, and Consumer markets.

 

You will be solving new technical challenges alongside leading industry professionals in an open, creative environment with plenty of opportunities for personal / professional growth.

Join our ambitious team within a multi-nation, multi-cultural company.  Marvell develops leading-edge products within a unique high-tech environment that motivates & encourages continued learning and growth!

What You Will Be Doing

The Data Storage SOC Mobile group is exciting, rewarding & dynamic, with many opportunities for professional growth for a motivated candidate. As part of Marvell's Data Storage division we develop and implement the leading edge System-on-Chip solutions.

You work closely with your peers, Test Engineers, Field Application Engineers and Product Engineers to find the optimal and most cost efficient solution for our customers.

Your Key Responsibilities Will Include

• Design and integrate IPs for System-on-Chip solution using state-of-the-art IC design methodologies and design flows.

• Perform RTL coding

• Perform functional verification of design on block & system level

• Perform synthesis & timing closure

• Perform ATPG & test pattern generation

• Provide design documentation, description & information to Application Engineers, Test Engineers, Production Engineers and customers.

Education & Experience Necessary for Success

• BSEE/Computer Engineering and 4+ years of experience in ASIC/SOC design

• Familiar with digital IC design methodologies, understands all stages of ASIC design flows, and is experienced with state-of-the-art design tools.

• Strong in logic design and verification, and has solid knowledge of related VLSI architectures.

• Knowledge of HDL and experience in behavioral and RTL coding, Verilog preferred.

• Knowledge of verification of design at block and system level.

• Knowledge of logic synthesis and timing analysis.

• Knowledge of SCAN/DFT.

• Knowledge of CDC

 

#LI-LH1

#GLDR

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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