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Entry Level RTL Design Engineer

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Design Engineering
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181971 Requisition #
As an entry-level RTL design engineer, you will contribute in the development of next-generation multi-core processors.  You will work directly with senior members of the design team to learn and design high speed SoCs.
Duties will include contribution to the development of a co-processor unit or industry standard, high-speed serial bus interface for Marvell’s next generation multi-core embedded ARM processor family targeted at Networking, Storage, Security, and Wireless applications in state-of-the-art deep sub-micron CMOS process technologies.

#LI-KB1
#GLDR
  • BS degree with 1 year of experience or MS degree in EE or CS.
  • Experience in one or more of the following: RTL design, synthesis, static timing analysis, formal verification, or functional verification.
  • Experience in designing high-speed (>1 GHz) /high-performance embedded processor SOC products is a plus.
  • Knowledge of scripting languages such as Python, Perl, and Tcl is desirable.
  • Design knowledge of industry standard bus interfaces (PCIe, SPI, SRIO, USB, XAUI, etc.) or memory interfaces (DDR2, DDR3, etc.) is a plus.
  • Knowledge of physical design is a plus.
  • Proficiency with front-end design tools and methodologies is a plus.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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