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Digital Design Intern (Serdes)

Design Engineering
190454 Requisition #
Thanks for your interest in the Digital Design Intern (Serdes) position. Unfortunately this position has been closed but you can search our 0 open jobs by clicking here.

Minimum Education Experience:

Required: Bachelor’s in electrical Engineer

Preferred: Master's or PhD in Electrical Engineer


Minimum Qualification:

- Strong oral and written communication skills, team first spirit

- Verilog ASIC design techniques

- Fundamental signal processing knowledge

- Static Timing Analysis: Synopsys Primetime, Design Compiler

- Multiple clock domain design concept

- Fundamental Design Verification

  Preferred Qualification:

- Strong signal processing knowledge

- Knowledge of SystemVerilog, UVM

- Knowledge of Analog/Mix Signal

- Knowledge of Microcontroller, Assembly and C coding

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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