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Design verification Intern

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Design Engineering
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190088 Requisition #

About the Position:

Marvell, a leading supplier of high performance storage networking solutions, has an opening for a Design Verification intern in its Server Connectivity Business Unit. This is a full time summer opportunity where your primary function is the advanced verification of leading edge Fibre Channel SoCs.

 

Responsibilities:

o   Understanding the requirements of the product

o   Verifying advanced Fibre Channel SoCs using SystemVerilog, C/C++, Python and Perl on Linux

Minimum Qualifications:

o   Candidates pursuing a BS/MS (preferred) degree in CS/EE or related technical field(s)

o   0-1 years of previous experience

 

Preferred Qualifications:

o   Good problem solving skills

o   ASIC Design or Verification coursework or experience, pursuing an MS in EE/CS and good verbal and written communication skills

o   Strong Programming Skills in at least one programming language; OOP preferred

o   Experience using Linux or other Unix-like OS

o   Experience in SystemVerilog is a plus

o   Experience in Networking or other system level protocol is a plus

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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