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Design Verification Engineer - Network Processors

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Design Engineering
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182131 Requisition #

 

In this role, the successful candidate will:
  • Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers. 
  • Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete.  
  • Develop tests and tune the environment to achieve coverage goals. 
  • Debug failures and work with designers to resolve issues. 
  • Verify boot code 
  • Architecting, developing, and maintaining tools to streamline the design of state-of-the-art multicore SoCs. 
  • Transform the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment. 
  • Unit and regression testing of software tools. 
  • Turn verification tests into hardware-test patterns. 
Requirements: 
  • Extremely strong programming skills including object-oriented design and implementation. Proficient using C++, Verilog, and ARM assembly
  • Experience with System Verilog preferably UVM. 
  • Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment. 
  • Experience with scripting language such as Python or Perl and EDA Verification tools. 
  • Good understanding of Linux OS. 
  • Understanding of networking protocols a plus.

Education:

  • BS, MS, or PhD and 3+ years of SOC Design/Verification experience

Additional Skills:  

  • Diligent, willing to take initiative, and able to handle assignments with minimal supervision
  • Demonstrates good analysis and problem-solving skills
  • Has an inherent sense of urgency and accountability
  • Must have the ability to multi-task in a fast paced environment
  • Excellent oral, written, and interpersonal communications skills

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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