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Design Verification Engineer - Network Processors

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Design Engineering
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182137 Requisition #
Responsibilities:
  • Contribute as an ASIC Verification Engineer developing the next generation of cloud, networking, and security processors. 
  • Work with Architects and Designers to develop complex verification environments, learning and using the latest state-of-the-art techniques, to prove the design and architecture and discover problems and suggest improvements.
  • As a new engineer at Marvell, we value your ideas and your work will have a direct impact to the company.  You will be given excellent opportunities to learn and grow that will turbo charge your career.
Requirements:
  • Extremely strong programming skills including object-oriented programming
  • Proficient using C++ and Verilog/VHDL and Perl/Python
  • Solid understanding of computer architecture
  • Knowledge of semiconductor design verification techniques
  • Knowledge of System Verilog/UVM

Education: 

  • BS/MS/PhD with 1 to 3 years of SOC Design/Verification experience

Additional skills:

  • Diligent, willing to take initiative, and able to handle assignments with minimal supervision.
  • Demonstrates good analysis and problem-solving skills
  • Has an inherent sense of urgency and accountability
  • Must have the ability to multi-task in a fast paced environment
  • Excellent oral, written, and interpersonal communications skills

 

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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