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Design Verification Engineer

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Design Engineering
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182620 Requisition #
Thanks for your interest in the Design Verification Engineer position. Unfortunately this position has been closed but you can search our 0 open jobs by clicking here.

Required:

• Bachelor’s degree in Electrical Engineering or related fields

• 3+ years of field experience

• Excellent written and verbal communication skills

• Excellent analytical problem solving skills

• Ability to work collaboratively in a team environment and to complete projects independently

• Expected to efficiently apply solutions to resolve complex technical problems


Desired:

• Master’s degree and/or PhD in Electrical Engineering or related fields

• 5+ years of field experience

• Experience using UVM

• Experience with Verilog and SystemVerilog

• Experience with scripting and workflow automation

• Demonstrated skills in ASIC/FPGA design and simulations

• Experience with synthesis and timing closure

• Experience with ATPG and test pattern generation

 

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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