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Design Engineering
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183019 Requisition #
  • Contribute to the development of one or more coprocessor units, cache and memory subsystems and high-speed interfaces and fabrics for Marvell’s next generation multi-core embedded ARM processor family targeted at Networking, Storage, Security, and Wireless applications in the state-of-the-art deep sub-micron CMOS process technologies.
  • Participate in all aspects of ASIC development including:
    • Micro-architecture definition
    • Design implementation using RTL coding techniques
    • Verification of the design using constrained random and formal techniques
    • Synthesis, place & route, power optimization and timing closure.
    • Lab bring-up and debug
    • Solid RTL design skills acquired through participation in multiple chip developments.
    • Experience with high speed (>1GHz clock frequency) and high-performance pipelined designs
    • Strong background in computer architecture. A background in networking and/or cryptography is a plus    
    • Hands-on experience associated logical and physical ASIC design tools and methodologies.
    • Knowledge of Python and exposure to object-oriented programming is highly desirable.
    Other Skills/Traits: 
    • Must have effective interpersonal, teamwork, and communication skills.
    • Demonstrates good analysis and problem-solving skills.
    • Has passion for the work and an inherent sense of urgency and accountability.
    • Willingness to learn
    Experience/Education: 
    • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 3-5 years of related professional experience OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 2-3 years of experience.

    All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.


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